Bump formation method and bump forming apparatus for semiconductor wafer

ABSTRACT

A bump formation method and a bump forming apparatus for a semiconductor wafer are provided in which productivity when bumps are formed onto the semiconductor wafer is improved as compared with the conventional art. There are provided a bump forming head, a recognition device, and a control device. ICs formed on the semiconductor wafer are divided into basic blocks. Bump formation is performed continuously for the ICs included in one basic block. Positional recognition for the other basic blocks is performed only when the bump formation operation is shifted from one basic block to another basic block. Thus, in comparison with the conventional art whereby a positional recognition operation is performed every time bumps are formed on each IC, the number of times of performing positional recognition is greatly reduced, so that productivity can be improved.

This application is a National Stage application of InternationalApplication No. PCT/JP01/10000, filed Nov. 16, 2001.

TECHNICAL FIELD

The present invention relates to a bump formation method for formingbumps on electrodes of each of ICs formed on a semiconductor wafer, anda bump forming apparatus which carries out the bump formation method.

BACKGROUND ART

Conventionally in forming bumps on electrodes of ICs (integratedcircuits), bumps have been formed on every one of IC chips, i.e., anindividual piece cut one by one from a semiconductor wafer. Aconventional bump formation method is inferior in productivity becauseit requires a transfer time for each individual piece to be transferredto a bump bonding apparatus to form bumps. For shortening the transfertime, an arrangement of transferring a semiconductor wafer to the bumpbonding apparatus to form bumps on the ICs on the semiconductor waferhas come to be performed.

When bumps are to be formed on ICs on the semiconductor wafer, it isnecessary to recognize positions of the ICs to form bumps on electrodesof the ICs. The semiconductor wafer itself is heated to approximately150–200° C. when bumps are formed, and this heating affects the bumpbonding apparatus as well, e.g., thermally expands the apparatus or thelike. As such, a mark for position recognition formed on each IC hasbeen conventionally imaged by a recognition camera for every IC beforethe bumps are formed on each IC, thereby correcting a position of thesemiconductor wafer.

The semiconductor wafer has, for example, nearly 3000–10000 ICs formedthereon. The larger the number of ICs, the more time it takes forpositional recognition to form bumps. When for instance, 2–4 bumps areformed on each IC, forming one bump takes approximately 60–80 msec. Onthe other hand, recognizing one position recognition mark requiresapproximately 200–250 msec. Since two position recognition marks shouldbe recognized for every IC, the time required for positional recognitionis considerably long as compared with the time for forming bumps,thereby deteriorating productivity.

SUMMARY OF INVENTION

The present invention is devised to solve the above-describeddisadvantage and has for its object to provide a bump formation methodand a bump forming apparatus for a semiconductor wafer in whichproductivity, when bumps are formed on the semiconductor wafer, isimproved in comparison with the conventional art.

In accomplishing this and other objectives, according to a first aspectof the present invention there is provided a method for forming bumps onsemiconductor wafers, comprising:

defining basic blocks, each of which has a plurality of ICs adjacenteach other in a row or column direction or in row and column directions,from among ICs arranged in a grid pattern on the semiconductor wafer tobe subjected to bump bonding; and

performing positional recognition for forming bumps with respect to eachof the basic blocks.

This bump formation method may be designed so that the method furthercomprises:

after performing the positional recognition, forming bumps for every oneof the above-defined basic blocks continuously on ICs included in eachbasic block on a basis of the positional recognition; and

when a bump formation operation is shifted from one basic block toanother basic block from among a plurality of basic blocks, performingpositional recognition for the another basic block for forming bumps onICs included in the another basic block.

A number of ICs for defining a basic block can be set to a value so thatpositional deviations of all electrodes of all ICs in the basic block,and all bumps formed on the electrodes, are accommodated within anallowable range when the bumps are continuously formed on theelectrodes.

The number of the ICs for defining the basic block may be determinedfurther based on at least either a position on the semiconductor waferwhere bumps are to be formed, or a time passed after a start of bumpformation for the semiconductor wafer.

After a plurality of the basic blocks are defined, when remaining ICs ofa number not satisfying the number of ICs for defining one of the basicblocks exist, bump formation and positional recognition for theremaining ICs may be performed for each of the remaining ICs or for acombination of a plurality of remaining ICs and one remaining IC untilbumps are formed on all of the remaining ICs.

The positional recognition for the basic block can be performed byrecognizing two marks for positional recognition present at diagonalpositions of the basic block from among marks for positional recognitionapplied to each of ICs at both ends of the basic block.

An inclination of the ICs arranged on the semiconductor wafer isdetected before the positional recognition operation is performed forthe basic block, so that detecting inclination of ICs included in thebasic block can be eliminated by recognizing only one of the two marksfor positional recognition at a positional recognition time for thebasic block.

Defective IC information showing a defective IC from among the ICsincluded in the basic block can be detected when bumps are continuouslyformed on the ICs.

It is possible not to form bumps on defective ICs on the basis of thedefective IC information.

According to a second aspect of the present invention, an apparatus forforming bumps on a semiconductor wafer is provided, which comprises:

-   -   a bump bonding apparatus for forming the bumps on ICs arranged        in a grid pattern on the semiconductor wafer to be subjected to        bump bonding;    -   a recognition device including an image pickup camera movable in        column and row directions above the semiconductor wafer for        imaging marks for detection on the semiconductor wafer, and        which detects a position and an inclination of the ICs on the        basis of image pickup information of the image pickup camera;        and    -   a control device for defining basic blocks, each of which has a        plurality of ICs adjacent each other in a row or column        direction or in row and column directions, from among ICs        arranged in a grid pattern on the semiconductor wafer, for        controlling the recognition device so as to recognize positions        in units of basic blocks, and for controlling the bump bonding        apparatus on the basis of positional recognition information        obtained by this positional recognition so as to continuously        form bumps for every basic block on the ICs included in the        basic block.

The control device can be adapted to obtain the number of ICs fordefining one basic block on the basis of an allowance value forpositional deviation between electrodes of the ICs and bumps to beformed on the electrodes.

The control device is further adaptable to determine the number of ICsfor defining the basic block on the basis of at least either a positionon the semiconductor wafer where bumps are to be formed, or a timepassed after a start of bump formation for the semiconductor wafer.

After a plurality of the basic blocks are formed along the row or columndirection, when remaining ICs of a number not satisfying the number ofICs for defining one of the basic blocks exist, the control device maycause bump formation and positional recognition for the remaining ICs tobe performed for each of the remaining ICs or for a combination of aplurality of remaining ICs and one remaining IC until bumps are formedon all of the remaining ICs.

The control device may cause the positional recognition for the basicblock to be performed by controlling the recognition device so as torecognize two marks for positional recognition from among marks forpositional recognition applied to each IC of the basic block.

The bump forming apparatus may be provided with:

-   -   a wafer turning member onto which a semiconductor wafer to be        subjected to bump bonding is loaded, and which is turned in a        circumferential direction of this loaded semiconductor wafer;        and

a turning device for turning the wafer turning member in thecircumferential direction via control of the control device,

wherein the control device detects an inclination of ICs arranged on thesemiconductor wafer, before a recognition operation for the basic blockis performed, by controlling the recognition device, further correctsthe inclination by controlling the turning device on the basis of adetected inclination value of the ICs so as to turn the semiconductorwafer loaded on the wafer turning member, and also controls therecognition device at a position recognition time for the basic block soas to recognize only one of the two marks for positional recognition andeliminate detection of inclination of the ICs included in the basicblock.

The control device can control the recognition device to detectdefective IC information showing a defective IC from among the ICsarranged on the semiconductor wafer.

The control device may control operation of the bump bonding apparatuson the basis of the defective IC information so as not to form bumps ondefective ICs.

According to the bump formation method of the first aspect and the bumpforming apparatus of the second aspect of the present invention asdescribed above, there are provided the bump bonding apparatus, therecognition device, and the control device, and the ICs formed on thesemiconductor wafer are divided into basic blocks. Bump formation iscontinuously performed for the ICs included in the basic blocks.Positional recognition for the basic blocks is conducted when bumpformation is changed from one basic block to another basic block. Ascompared with the conventional art wherein a positional recognitionoperation is performed every time bumps are formed on each IC, thenumber of times of performing positional recognition is greatly reducedand productivity can be improved.

A position between an electrode and a bump can always be kept proper bydetermining the number of ICs for defining a basic block in accordancewith at least one of a position on the semiconductor wafer where bumpformation is to be performed and a time passed after start of bumpformation.

Unless all ICs on the semiconductor wafer can be divided into blocks byusing only the basic block, bump formation is performed for each IC ofremaining ICs or for each combination of a plurality of ICs and one IC.Bumps can be formed on all ICs while the number of times of performingpositional recognition is reduced, thereby improving productivity incomparison with the conventional art.

Since a distance between two marks for positional recognition isincreased by so arranging as to recognize the position recognition marksat diagonal positions of the basic block, inclination of the basic blockcan be obtained with a higher accuracy.

Moreover, if inclination of ICs is detected in advance before bumpformation, it is enough at a bump formation time to recognize one of twomarks for positional recognition of the basic block. The number of timesof performing the positional recognition can be further reduced, so thatproductivity can be further improved.

In addition, detecting a bad mark at the bump formation time preventsbump formation from being performed for ICs with bad marks. Therefore, atime to be spent for forming bumps on the ICs which is unnecessary canbe reduced and productivity can be further improved.

BRIEF DESCRIPTION OF DRAWINGS

These and other aspects and features of the present invention willbecome clear from the following description taken in conjunction withpreferred embodiments thereof with reference to the accompanyingdrawings, in which:

FIG. 1 is a flow chart showing operations of a bump formation method ina preferred embodiment of the present invention;

FIG. 2 is a flow chart showing operations of the bump formation methodin the preferred embodiment of the present invention;

FIG. 3 is a flow chart showing an operation of detecting a position andan inclination of ICs of a semiconductor wafer, which can be performedbefore a bump formation operation of FIGS. 1 and 2;

FIG. 4 is a diagram for explaining a basic block formed during the bumpformation operation of FIGS. 1 and 2;

FIG. 5 is an enlarged view of one basic block of FIG. 4;

FIG. 6 is a diagram showing a different form of the basic block of FIG.4, and a form of a bad mark;

FIG. 7 is a diagram for explaining changing a number of ICs for definingthe basic block in accordance with a bump formation position on thesemiconductor wafer for the basic block of FIG. 4;

FIG. 8 is a diagram for explaining changing a number of ICs for definingthe basic block of FIG. 4;

FIG. 9 is a diagram of a state in which a sensor for measuring atemperature above the semiconductor wafer, or the like, is installed ona horn part and an image pickup camera so as to change a number of ICsfor defining a basic block;

FIG. 10 is a diagram showing a state with a bump formed on an electrode;

FIG. 11 is a diagram explanatory of a mark for positional correction,which is applied to an IC;

FIG. 12 is a flow chart for explaining a detailed operation of bad markdetection shown in FIG. 1;

FIG. 13 is a flow chart for explaining a detailed operation of the badmark detection shown in FIG. 1;

FIG. 14 is a diagram for explaining remaining ICs not in basic blocks;

FIG. 15 is a diagram of a case where a block for remainder is defined bythe remaining ICs of FIG. 14;

FIG. 16 is a diagram of a case where blocks for remainder are defined bythe remaining ICs of FIG. 14;

FIG. 17 is a diagram showing a view field, a maximum deviation area, andthe like of an image pickup camera for explaining a search operationperformed during step S32 of FIG. 3;

FIG. 18 is a flow chart for explaining one search operation performedduring step S32 of FIG. 3;

FIG. 19 is a flow chart for explaining another search operationperformed in step S32 of FIG. 3;

FIG. 20 is a flow chart for explaining a different search operationperformed during step S32 of FIG. 3;

FIG. 21 is a diagram for explaining the search operation of FIG. 18;

FIG. 22 is a diagram for explaining a quantity of movement of a viewfield of the search operation of FIG. 18;

FIG. 23 is a diagram for explaining the search operation of FIG. 19;

FIG. 24 is a diagram for explaining the search operation of FIG. 20;

FIG. 25 is a diagram for explaining the search operation of FIG. 20;

FIG. 26 is a diagram of an example of a shape of a detection mark forinclination correction during the search operation of FIG. 20;

FIG. 27 is a diagram of an example of another shape of the detectionmark for inclination correction during the search operation of FIG. 20;

FIG. 28 is a diagram of one example of a second detection mark forrecognition during step S4 of FIG. 1;

FIG. 29 is a perspective view of a bump forming apparatus of theembodiment for executing the bump formation method of FIG. 1; and

FIG. 30 is a perspective view of a heating device for bonding shown inFIG. 29.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

A bump formation method for a semiconductor wafer, and a bump formingapparatus for a semiconductor wafer which performs the bump formationmethod according to a preferred embodiment of the present invention willbe described hereinbelow with reference to the drawings in which likeparts are designated by like reference numerals. All of ICs (integratedcircuits) formed on the semiconductor wafer are equal in size and inshape. A manner of forming ICs on the semiconductor wafer is notspecified, such that ICs can be formed on an entire face including acircumferential edge part of the semiconductor wafer or ICs can berefrained from being formed on a marginal part when the marginal part isprovided at a circumferential edge part.

In order to accomplish the above-described objective of improvingproductivity in forming bumps on a semiconductor wafer as compared withthe conventional art, roughly, a first to a third operation as expressedbelow are intended to be performed during a bump formation method forthe semiconductor wafer of the embodiment.

First, one block is defined by a plurality of ICs (integrated circuits)formed on the semiconductor wafer. Positional recognition is performedfor every block by recognizing two marks for positional recognitionincluded in each block, and positional recognition is omitted when bumpsare formed on each of ICs included in the block. The number of times ofperforming positional recognition is thus reduced in comparison with theconventional art, so that productivity is improved.

Second, recognition of two marks for positional recognition in the blockis reduced to one mark, thereby improving productivity more.

Third, presence/absence of bad marks applied to ICs on the semiconductorwafer, i.e. the ICs not functioning as ICs (defective ICs) isdetermined, so that bumps are not formed on these defective ICs. Thus,productivity is further improved.

The bump forming apparatus for a semiconductor wafer which performs theabove bump formation method for the semiconductor wafer is schematicallyshown in FIG. 29. Bump forming apparatus 101 comprises one heatingdevice 110 for bump bonding, a recognition device 150, a control device180, and one bump forming head 190 corresponding to one example of abump bonding apparatus. The bump forming apparatus preferably includescarriers 130, transfer devices 140 arranged respectively on a carry-inside and a carry-out side, a preheating device 160, and a post-heatingdevice 170.

The heating device 110 for bump bonding is roughly comprised of, asshown in FIG. 30, a wafer turning member 111, a turning device 112, anda wafer heater 113. The heating device 110 holds on the wafer turningmember 111 a semiconductor wafer 201 without bumps formed thereon, whichis to be subjected to bump bonding, and heats this loaded semiconductorwafer 201 by the wafer heater 113 to a bump bonding temperature which isapproximately 150° C. in the embodiment. A semiconductor wafer, afterbumps are formed by the bump forming head 190 on electrodes of ICs onthe semiconductor wafer 201, will be denoted as a bump-formed wafer 202.

The wafer turning member 111 has a metallic disc wafer stage 1111 of alarger diameter than a diameter of the semiconductor wafer 201 forloading the semiconductor wafer 201 thereon, and a metallic discturntable 1112 of a nearly equal size as a size of the wafer stage 1111having teeth 11127 formed on an entire circumference thereof to bemeshed with a gear 1122, to be described later, of the turning device112.

The turning device 112 is a device for turning the wafer turning member111 with the semiconductor wafer 201 loaded thereon in a circumferentialdirection of the semiconductor wafer 201. In the present embodiment, theturning device 112 has as a driving source 1121 a servo motor which iscontrolled by the control device 180, the gear 1122 to be meshed withthe teeth 11127 of the turntable 1112, and a rotational forcetransmission mechanism 1123 for transmitting a driving force generatedby the driving source 1121 to the gear 1122, thereby rotating the gear1122 while preventing heat of the turntable 1112 from being conducted tothe driving source 1121. Although a timing belt is used as therotational force transmission mechanism 1123 in the embodiment, thetransmission mechanism is not limited to this structure.

As described hereinabove, since the semiconductor wafer 201 is turnedvia the driving source 1121, the rotational force transmission mechanism1123, the gear 1122, teeth 11127 of the turntable 1122, and the waferstage 1111, a turning angle of the semiconductor wafer is controlled bythe control device 180, thereby enabling the semiconductor wafer 201 tobe turned by any angle.

The recognition camera 150, with an image pickup camera 151, detects aposition of an IC and an inclination relative to a reference line of theIC on the basis of image pickup information of the image pickup camera151. The image pickup camera 151, which is freely movable in row andcolumn directions above the semiconductor wafer 201, picks up images ofmarks 224 and 2232–2234 for detection on the semiconductor wafer. Therecognition device 150 is connected to the control device 180. Thecontrol device 180 controls the turning device 112 on the basis ofdetected inclination information, thereby controlling a quantity of aturn of the wafer turning member 111.

The bump forming head 190 is a device for forming bumps onto electrodesof the ICs on the semiconductor wafer 201 loaded on the wafer turningmember 111 of the heating device 110 and heated to a bump bondingtemperature. The bump forming head 190 includes, in addition to a wiresupply part 191 for supplying a gold wire as material for a bump, a bumpformation part for melting the gold wire to form a melted ball andpressing the melted ball to an electrode, an ultrasonic wave generationpart for applying ultrasonic waves to the bump at a pressing time, andthe like. The thus-constituted bump forming head 190 is attached on anX, Y table 192 which has, e.g., a ball screw structure and is movable inmutually orthogonal X and Y directions in a plane. The bump forming head190 is moved in the X, Y directions by the X, Y table 192 so as to beable to form bumps on electrodes of each IC of fixed semiconductor wafer201.

The carriers 130 are devices for removing the semiconductor wafer 201from a first storage container in which the semiconductor wafer 201 isstored, and for transferring bump-formed wafer 202 to a second storagecontainer which is to store the bump-formed wafer 202.

One of the transfer devices 140 receives the semiconductor wafer 201from one of the carriers 130, then transfers the wafer 201 to thepreheating device 160, and moreover transfers the wafer 201 from thepreheating device 160 to the heating device 110 for bump bonding. Theother transfer device 140 transfers the bump-formed wafer 202 from thewafer stage 1111 to the post-heating device 170 and delivers the wafer202 from the post-heating device 170 to another of the carriers 130.

The preheating device 160 is a device for raising a temperature of thesemiconductor wafer 201 loaded thereon from room temperature to a bumpbonding temperature, at which bumps are formed, by the heating device110.

The post-heating device 170 is a device for gradually decreasing atemperature of the bump-formed wafer 202 loaded thereon from the bumpbonding temperature to near room temperature.

The control device 180 controls each part constituting the bump formingapparatus 101 of the above constitution, thereby controlling the bumpformation method, including the aforementioned first-third operations,to be described in detail below.

The bump formation method performed by the above-constituted bumpforming apparatus 101 will be described hereinbelow. The bump formationmethod is executed by control performed by the control device 180.Processing and transfer operations of the semiconductor wafer 201 fromthe first storage container to the heating device 110, and processingand transfer operations of the bump-formed wafer 202 from the heatingdevice 110 to the second storage container, after bumps are formed onthe semiconductor wafer 201, are omitted from the following description.An operation up to an end of bump formation, after the semiconductorwafer 201 is loaded onto the wafer stage 1111 of the heating device 110,will be detailed below.

The bump formation method is briefly indicated in FIGS. 1–3, which willbe discussed for each step (designated by “S” in the drawings).

An allowable range of a positional deviation of bumps on electrodes,when bumps are formed on the electrodes of an IC, is conventionally ±5μm. A value of the allowable range is determined while thermal expansionor the like of the image pickup camera 151 and the bump forming head190, because of heat heating semiconductor wafer 201 for bump formation,is taken into account. The allowable range of ±5 μm is a range which canbe satisfied even when bumps are formed onto electrodes on a single IChaving a size of 5–6 mm square. Therefore, with respect to a single IChaving a size of 0.5 mm or 0.35 mm square these days, the allowablerange can be fulfilled even if bumps are continuously formed on, e.g.,approximately ten ICs, without executing positional recognition.

Therefore, according to the present embodiment, in step S1, a basicblock is defined having a plurality of ICs adjacent each other in a rowor column direction, or in row and column directions, from among ICsarranged in a grid pattern on the semiconductor wafer 201 to besubjected to bump bonding. Positional recognition is executed withrespect to the basic block. Then, bumps are continuously formed on allICs included in the basic block. So, a bump forming operation is carriedout for every basic block. When bump formation is moved from one basicblock to another basic block, from among basic blocks, positionalrecognition is executed with respect to the another basic block to formbumps on ICs included in the another basic block.

By adopting this method, the number of times of performing IC positionalrecognition can be reduced in comparison with the conventional art, inwhich a recognition operation is performed for every IC. Thus,productivity of forming bumps on a semiconductor wafer can be improvedas compared with the conventional art.

The number of ICs for defining the above basic block is a value that,when bumps are continuously formed onto electrodes of all ICs in thebasic block without executing positional recognition for each IC, all ofpositional deviations between the electrodes and bumps thereon is keptwithin an allowable range. Conversely, a single basic block is definedby such a number of ICs.

The number of rows and columns of ICs for forming the basic block ispreliminarily stored in a memory part 181 in the control device 180.

An operation for forming the basic block will be described below withreference to the drawings. As shown in FIG. 4, the semiconductor wafer201 loaded on the wafer stage 1111, and sucked to the wafer stage 1111,in the embodiment has a plurality of ICs 223 arranged in a grid patternalong a row direction 221 and a column direction 222. The control device180 forms basic blocks 230 starting from IC 223 where bump formation isto be started in accordance with a stored number of rows and columns ofICs for defining the basic block. For example, as shown in FIG. 4 thecontrol device 180 forms basic blocks 230-1, 230-2, . . . , of, e.g.,one row and four columns from, e.g., a circumferential edge portion of acentral part of the semiconductor wafer 201.

A position where bump formation is to be started is not restricted tothe aforementioned position. Also, the number of rows and columns of ICsfor defining the basic block is not limited to the above, and the basicblock may be defined, for instance, by a plurality of rows and aplurality of columns as shown in FIG. 6, or may be defined by aplurality of rows and one column.

The number of rows and columns of ICs in the basic block 230 is notlimited to a constant value and can be changed. For example, while theultrasonic wave generation part of the bump forming head 190 is partlypositioned above the wafer stage 1111 at a circumferential edge portionof the semiconductor wafer 201, another part is positioned away from thewafer stage 1111, and consequently, a thermal effect of the ultrasonicwave generation part becomes uneven in some cases because the waferstage 1111 is heated to form bumps as described earlier. As such, for aposition, e.g., the circumferential edge portion of the semiconductorwafer 201 where a thermal effect is not even to, e.g., a horn part 193of the ultrasonic wave generation part of the bump forming head 190 asshown in FIG. 7, the basic block can be defined by one row and twocolumns like basic blocks 231-1, 231-2. On the other hand, for aposition, e.g., a central portion of the semiconductor wafer 201 where athermal effect is relatively even, the basic block can be defined by onerow and four columns as in basic blocks 230-1, 230-2.

As indicated in FIG. 8, in a case where bump formation is started from,e.g., an IC 223-1, basic blocks 230 may not be formed while a lapse oftime from a start of bump formation is short, and basic blocks 230 areformed as passed time is longer. That is, the number of rows and columnsof ICs may be increased to a certain constant value such as, e.g., in abasic block 230-4 of one row and two columns, and a basic block 230-5 ofone row and three columns.

A temperature sensor of, e.g., a thermocouple or strain sensor 195 maybe attached to at least either the horn part 193 of the bump forminghead 190 or the image pickup camera 151 as shown in FIG. 9, so that thecontrol device 180 may determine the number of rows and columns of ICsin the basic block 230 on the basis of output information of the sensor195.

Alternatively, the number of rows and columns of ICs of the basic block230 may be determined by a position of the ICs 223 on the semiconductorwafer 201 where bumps are to be formed, or the number of rows andcolumns of ICs may be forcibly determined or changed.

Defining the basic block 230 in the control device 180 is carried out ina manner as follows, in the embodiment. As similar to the conventionalart, the control device 180 has a program for bump formation stored inthe memory part 181 for each of all ICs 223 formed on the semiconductorwafer 201. Positional information of every two marks 224 for positionalrecognition present on each IC 223 indicating an arrangement position ofthe IC 223, positional information of each electrode 225 present on eachIC 223, and information of a bump formation order for the electrodes 225present on one IC 223, and the like are described in the program. Thecontrol device 180, by utilizing the program for bump formation,executes a bump formation operation while taking a region of theabove-determined number of rows and columns of ICs as the basic block230.

In other words, with respect to one unit defining one basic block 230,forming a fresh program which represents positional information of thebasic block, positional information of electrodes in the basic block,and the like is not executed. The existing program for bump formation isutilized to form bumps. A need of correcting or reforming the program isaccordingly eliminated even if the number of rows and columns of ICs ofthe basic block 230 is changed, thereby facilitating adaptation with ahigh degree of freedom.

After the control device 180 determines the basic blocks 230 as above,in step S2, positional recognition is performed for the basic block 230,including ICs 223 on which bumps are to be formed. Each of the ICs 223constituting the basic block 230 has two marks 224 for positionalrecognition as mentioned above. In the embodiment, first, one of twomarks 224 for positional recognition corresponding to diagonal positionsof the basic block 230, from among marks 224 of the ICs 223 present atboth ends of the basic block 230, is imaged by the image pickup camera151 of the recognition device 150. For example, in the basic block 230shown in FIG. 5 a first mark 224-1 for positional recognition, of twomarks 224-1 and 224-2 for positional recognition corresponding todiagonal positions, is imaged.

In next step S3, it is determined whether or not information forpositional correction of the ICs 223 is already obtained and aninclination of the ICs 223 is already corrected when the semiconductorwafer 201 is placed on the wafer stage 1111. Although an operation ofobtaining the information for positional correction for the ICs 223 andcorrecting the inclination of the ICs 223 which are determined in stepS3 will be described in detail later, in a case where the ICs 223 arealready corrected, particularly in inclination, operation of next stepS4 can be eliminated. Accordingly, the number of times of performing arecognition operation is reduced and productivity is improved. On theother hand, if inclination is not yet corrected, the method proceeds tonext step S4.

In step S4, the image pickup camera 151 of the recognition device 150images remaining second mark 224-2 for positional recognition of the twoposition recognition marks 224-1 and 224-2. Based on positionalinformation of the two position recognition marks 224-1 and 224-2, thecontrol device 180 obtains a position and an inclination of the basicblock 230 according to a known arithmetic method.

In the present embodiment, position recognition marks 224-1 and 224-2present at both ends of the basic block 230 are employed in steps S2 andS4. Although using the position recognition marks 224 present atdiagonal positions is preferred, particularly from a viewpoint ofobtaining inclination information of the basic block 230, positionrecognition marks 224 to be used are not limited to the positionrecognition marks 224-1 and 224-2 present at both ends of the basicblock 230, and any different two marks can be selected to be theposition recognition marks.

In succeeding step S5, on the basis of the above inclination informationof the basic block 230 which is obtained during step S2 or during stepsS2 and S4, the control device 180 controls the turning device 112 of theheating device 110 to turn the wafer stage 1111 so that the IC 223becomes parallel to a reference line, e.g., the X direction or Ydirection. At this time, the wafer stage 1111 can be turned by any anglebecause the present embodiment adopts a constitution including the waferturning member 111 and the turning device 112 as described before.

The control device 180 controls a quantity of movement of the X, Y table192 of the bump forming head 190, based on the above positionalinformation of the basic block 230, when bumps are to be formed.

During following step S6, the control device 180 controls the bumpforming head 190, based on a program for bump formation, with respect tothe semiconductor wafer 201 loaded and sucked onto the wafer stage 1111and also heated to a bonding temperature, thereby forming bumps 226 asshown in FIG. 10 onto each of electrodes 225 of the ICs 223 included inthe basic block 230.

Bumps are continuously formed during the bump formation operationwithout performing positional recognition of IC 223 for all ICs 223included in one basic block 230. Without a positional recognitionoperation executed for each of the ICs 223 according to the embodiment,the number of times of performing positional recognition is reduced incomparison with the conventional art, thus enabling productivity to beimproved.

Step S7 is performed together with bump formation after the bumps 226are started to be formed.

During the aforementioned step S7, it is determined whether or not a badmark, applied to the ICs 223 included in the basic block 230 to whichthe bump formation is being performed, is to be detected. The bad markis applied, e.g., during an inspection after a wiring patternrecognition process which is performed before the bumps are formed ontothe electrodes 225, and is a mark for indicating a defective IC notfunctioning as an IC. The bad mark is applied to a nearly central partof the IC 223 as shown by numeral 227 in FIG. 6, or applied over-lappingwith one of two position recognition marks 224 of IC 223 as shown inFIG. 11. The bad mark is formed at any position on the IC 223. In a casewhere the bad mark 227 is formed overlapping with position recognitionmark 224, it becomes impossible to recognize the position recognitionmark 224. Therefore, with utilization of such non-recognition, it can bedetermined that the IC 223 or basic block 230 is a defective IC ordefective block if the position recognition mark 224 cannot berecognized. However, bad marks 227 might be included on other ICs 223 inthe basic block 230 in some cases when the bad mark 227 is not detectedat the position recognition mark 224 of the basic block 230. Therefore,detection for the bad mark 227 is preferably performed for other ICs 223as well.

The presence/absence of the bad mark is detected by imaging the ICs 223by the image pickup camera 151 in the embodiment.

In a case where the bad mark 227 is applied to one of two positionrecognition marks 224-1 and 224-2 to be recognized in the basic block230, and when the bad mark is actually detected, positional recognitionwith respect to other basic blocks 230 may be started without formingbumps for the subject basic block 230. However, some of the ICs 223constituting the basic block 230 which are detected to include the badmark 227 may be good ICs. In order not to waste good ICs, even if one ofthe position recognition marks 224-1 and 224-2 imaged for the positionalrecognition of the basic block 230 has the bad mark 227, it ispreferable to make a determination for each of the ICs 223 included inthe basic block 230 as to whether or not the bad mark 227 is appliedthereto, as shown in steps S811–S813 in FIG. 13.

Suppose that the basic block 230 is defined by, e.g., six ICs 223 of onerow and six columns, when the basic block 230 is detected throughpositional recognition to include the bad mark 227, it may be soarranged as shown in step S814 of FIG. 13 that the presence/absence ofthe bad mark 227 is recognized for each of divided basic blocks whichare obtained by more finely dividing the subject basic block 230 inplace of immediately determining the presence/absence of the bad mark227 for each IC 223 in the basic block as above. If the bad mark 227 isdetected in a divided basic block, the presence/absence of the bad mark227 is recognized for a next divided basic block or next basic block.Operation of step S814 is effective when two position recognition marks224 are to be recognized for the basic block 230.

Alternatively, the IC 223 detected to include the bad mark 227 may beseparated from the basic block 230 so as not to form bumps on this IC223 with the bad mark, and positional recognition of the basic block 230may be executed with a next, e.g., adjoining IC 223.

The following description of a bad mark detection operation exemplifiesa case of determining a presence/absence of bad mark 227 for every oneof all ICs 223 in the basic block 230.

When the bad mark is to be detected, the method proceeds to next stepS8, where the bad mark is detected. The control device 180 stops formingbumps on the IC 223 determined to have the bad mark and moves to detecta bad mark for a next IC 223. A time required for forming bumps on theIC 223 with the bad mark, which is useless, can be cut by this operationand productivity can be improved.

On the other hand, when the bad mark is not to be detected, the methodproceeds to step S9 while bumps are formed on all ICs 223 included inthe basic block 230.

When inclination correction for the semiconductor wafer 201 is alreadyexecuted, which is determined during the above-described step S3, andwhen the bad mark 227 is formed overlapping with one positionalrecognition mark 224, an operation to be described below may beperformed during step S8 with reference to FIG. 12. It becomesimpossible to recognize the position recognition mark 224 when the badmark 227 is formed overlapping therewith, and eventually it becomesimpossible to recognize a position of the IC 223 or basic block 230. Foravoiding this, with respect to each IC 223, it is necessary to treat, inaddition to the position recognition mark 224, an arbitrary point in acircuit pattern on the IC 223 as a mark 228 for positional correction tosubstitute for the position recognition mark 224 as shown in FIG. 11.The mark 228 for positional correction is illustrated to be triangularin FIG. 11 for the sake of convenience. Although the mark 228 forpositional correction may be formed separately on the IC 223, it issimpler and preferable to register an arbitrary point in the circuitpattern of the IC 223 into a program as the position correction mark228.

Regarding FIG. 12 showing operation of step S8 in detail, during stepS801, the control device 180 controls the recognition device 150 torecognize one position recognition mark 224 of the IC 223 included inthe basic block 230 as described earlier. When this position recognitionmark 224 can be recognized, in other words, when the IC 223 includes nobad mark, the method proceeds to step S802, during which the controldevice 180 controls the bump forming head 190 to form bumps 226 onelectrodes 225 of the IC 223.

Meanwhile, when the position recognition mark 224 cannot be recognizedin step S801, that is, when the IC 223 has the bad mark, the methodproceeds to step S803 and the control device 180 determines whether ornot the number of counts that the position recognition mark 224 cannotbe recognized is n or less. In other words, an amount of defective ICsis continuously detected and determined.

In some cases, a position of a good IC cannot be determined even if thegood IC is detected after many defective ICs are detected, or a quantityof a positional deviation between an electrode and a bump exceeds anallowable range even when bumps are formed on electrodes of the good IC.Therefore, the above number n is the number of ICs 223 of which at leastthe quantity of the positional deviation between the electrode 225 andthe bump 226 of the IC 223 is accommodated within the allowable range.The number n is set in the control device 180 in advance.

When the number of counts for which the position recognition mark 224cannot be recognized is not larger than n during step S803, the methodproceeds to step S9. On the other hand, when the number of countsexceeds n, it is highly possible that the quantity of the positionaldeviation between the electrode 225 and the bump 226 of the IC 223exceeds the allowable range as mentioned above. Then it is determinedduring step S804 whether or not the operation is to be stopped becauseof an error, and the operation is stopped during step S806 if it is sodetermined. Oppositely, if the operation is not to be stopped, themethod proceeds to step S805 and the control device 180 controls therecognition device 150, thereby recognizing the position correction mark228 and confirming a present position to correct this position. Themethod then proceeds to step S9.

Although it is so adapted in the embodiment as to actually detect thepresence/absence of the bad mark 227 during steps S8, S801–S806 andS811–S814, bump formation may be executed on the basis of, e.g.,positional data of defective ICs in an already processed semiconductorwafer. In this case, since positional data of defective ICs is hardlyequal in all semiconductor wafers 201, it is preferable to detect aposition of the bad mark 227 again and update positional information ofthe bad mark 227 for every constant number of wafers. The above constantnumber can be appropriately set by a manufacturer of the semiconductorwafer 201, a production lot of the semiconductor wafer, and the like.

Even when the bad mark 227 is not to be detected during step S811, stepS815 may be performed to determine whether or not the bad mark 227 is tobe detected for each of ICs 223 in the basic block 230. The methodproceeds to step S9 when this detection is not to be performed, whereasthe method proceeds to step S813 when the detection is to be performed.

During next step S9, it is determined whether or not bumps are alreadyformed on all ICs 223 included in the basic block 230 subjected to bumpformation. The method returns to step S6 if an IC 223 without bumpsformed thereon is present. The method proceeds to step S10 when bumps226 are formed on all ICs 223 in the basic block 230.

An example of bump formation order on all ICs 223 included in the basicblock 230 is indicated in FIG. 6. The basic block 230 is defined by ICs233 of two rows and two columns in FIG. 6. A bump 226 is formed on eachof electrodes 225 in the order designated by arrows 241–244. The bumpformation order is preferably such that bump formation is completed forevery IC 223 included in the basic block 230 to an almost uniform bumpformation state for one IC.

It is determined during step S10 whether or not bumps 226 are formed onall ICs 223 on the semiconductor wafer 201. The aforementioned all ICs223 means all good ICs in a case of not forming bumps on defective ICsas referred to above.

The bump formation method for the semiconductor wafer 201 is terminatedwhen bumps are formed on all ICs 223. On the other hand, the methodproceeds to next step S11 if there are ICs 223 without bumps yet formedthereon.

A process related to the bump formation is completed for one basic block230 through operations up to step S9. It is determined during step S11whether or not further basic blocks 230 can be formed from the ICs 223on the semiconductor wafer 201. Specifically, suppose that a certain rowin the semiconductor wafer 201 includes, e.g., 15 ICs 223 as shown inFIG. 14, three basic blocks 230, e.g., each of one row and four columnscan be formed and three ICs 223 are left in the row. These remainingthree ICs 223 cannot form the basic block 230 of one row and fourcolumns. That is, the basic block cannot always be defined by a setnumber of rows and columns of ICs.

When the basic block 230 can be formed of a set number of rows andcolumns of ICs, the method returns from step S11 to step S1 to perform aprocess related to bump formation as described above for defined basicblocks 230. However, if there are ICs 223 of a number not satisfying theset number of rows and columns, and consequently basic block 230 cannotbe formed, the method proceeds from step S11 to next step S12. On thesemiconductor wafer 201, a bonding boundary representing a region wherebumps 226 can be formed is arranged along circumferential edge parts ofICs 223 on the wafer 201. The above number not satisfying the set numberof rows and columns is a number which is obtained with respect to theICs 223 included within the region delimited by the bonding boundary.ICs of a number not satisfying the number of rows and columns forconstituting the basic block 230 in a certain row or column, or in acertain row and column, will be denoted as remaining ICs.

The control device 180 determines during step S12 whether to perform theprocess related to bump formation by forming the ICs 223, of a numbernot satisfying the set number of rows and columns, into blocks, toexecute the process related to the bump formation for every one of theICs 223, or to execute the process related to the bump formation by acombination of the above. Specifically with reference to the aboveexample, with respect to remaining ICs 223, one block 2351 for remainderis formed from all of the remaining ICs 223, namely, with the abovethree ICs 223 in this example as shown in FIG. 15, and then the processrelated to bump formation is performed for the block 2351.Alternatively, one block 2352 for remainder is formed from two ICs 223as shown in FIG. 16 and then the process related to bump formation isperformed for the block 2352, or the process related to the bumpformation is performed individually for each of the remaining ICs 223.

Whether to define block 235 for remainder with respect to the remainingICs 223, or to process the remaining ICs 223 one by one is preliminarilyprogrammed in the control device 180. In a case of defining the block235 for remainder, the number of rows and columns of ICs 223 fordefining the block 235 for remainder with respect to the remaining ICs223 may be automatically determined by the control device 180 or may beset beforehand.

During next step S13, the process related to bump formation whichcorresponds to operations of the above steps S2–S9 is executed eitherwith respect to the block 235 for remainder or each of the remaining ICs223, or with respect to the block 235 for remainder and each of theremaining ICs 223, which are constituted during step S12.

It is determined during next step S14 whether or not bumps 226 arecompletely formed on all ICs 223 on the semiconductor wafer 201. Ifthere are ICs 223 having bumps not formed thereon, the method returns tostep S12. On the contrary, when all ICs 223 have bumps 226 completelyformed thereon, the bump formation operation for the semiconductor wafer201 is finished. The semiconductor wafer 201 with the bumps 226 formedthereon is transferred and stored, as the bump-formed wafer 202, by thetransfer device 140 and the carrier 130 in the second storage container.

An operation of obtaining information for positional correction of theICs 223 formed on the semiconductor wafer 201, and of correctinginclination of the ICs 223 (referred to as a “wafer mark recognitionoperation” hereinafter), which is determined as to whether to havealready been executed or not during the above-discussed step S3, willnow be described with reference to FIG. 3 and the like. The wafer markrecognition operation is controlled by the control device 180.

During a process prior to forming bumps with the wafer 201 divided intoblocks, if the wafer mark recognition operation is executed when thesemiconductor wafer 201 is placed on the wafer stage 1111, therecognition operation for two position recognition marks 224-1 and224-2, performed during steps S2 and S4, can be reduced to therecognition for either one mark, so that productivity is improvedfurthermore.

This will be more specifically described. A position of an IC formationpattern on the semiconductor wafer with respect to an outline of thesemiconductor wafer 201, and an inclination of an arrangement in the rowand column directions of ICs 223 forming the IC formation pattern withrespect to reference lines corresponding to X and Y directions, i.e.,the inclination of the ICs, are uniform within the same production lotof the semiconductor wafers 201. However, a positional difference and aninclination difference are actually present between two differentproduction lots. As a result, bumps 226 may be positionally deviatedfrom electrodes 225 if bump formation is always started from an equalposition relative to the semiconductor wafers 201 of all productionlots.

In order to prevent this, the position of the IC formation pattern withrespect to the outline of the semiconductor wafer 201, and theinclination of ICs relative to the reference lines, are confirmed whenthe semiconductor wafer 201 is placed on the wafer stage 1111, therebyeliminating positional deviation of the bumps 226 relative to theelectrodes 225.

Particularly in the bump forming apparatus 101 of the presentembodiment, as described above, the semiconductor wafer 201 is turnedwith use of the wafer turning member 111 and the turning device 112arranged at the heating device 110 via the driving source 1121, therotational force transmission mechanism 1123, the gear 1122, the teeth11127 of the turntable 1112 and the wafer stage 1111, with a turningangle being controlled by the control device 180, so that thesemiconductor wafer 201 can be turned by any angle. In consequence, thewafer stage 1111 loading the semiconductor wafer 201 thereon can behighly accurately and easily turned on the basis of an angle ofinclination of the ICs obtained by performing the wafer mark recognitionoperation. The angle of inclination of the ICs can be highly accuratelyand easily corrected accordingly.

Since a need of obtaining the angle of inclination of the ICs through arecognition operation of two position recognition marks 224-1 and 224-2at a bump formation time is eliminated by correcting the angle ofinclination of the ICs beforehand, it is enough to obtain onlypositional information of the IC formation pattern by performing arecognition operation of either one of the position recognition marks224-1 and 224-2. The number of times of performing a recognitionoperation can hence be further reduced and productivity can be improved.

The above wafer mark recognition operation will be described in detail.

During step S31 shown in FIG. 3, it is determined whether or not a firstpoint, from among characteristic points on the semiconductor wafer 201loaded on the wafer stage 1111, is recognized by the image pickup camera151 of the recognition device 150. In other words, it is necessary forexecuting the above wafer mark recognition operation to recognize by theimage pickup camera 151 two arbitrary detection points for recognitionwhich correspond to marks for detection on the semiconductor wafer 201.A first detection point for recognition, from among the above twodetection points for recognition, is set in the control device 180beforehand. As shown in FIG. 17, according to the embodiment, a cornerpart of an outline 2231 of the IC formation pattern formed at thecircumferential edge part of the semiconductor wafer 201, on which ICs223 are formed by a stepper, is set as a first detection point 2232 forrecognition.

The image pickup camera 151 has a view field 1511 as indicated in FIG.17, having a point to be recognized such as, e.g., the first detectionpoint 2232 for recognition at a central position of the view field. Therecognition device 150 can obtain a coordinates position of the point tobe recognized if the point to be recognized is included in a cell 1512for rough recognition inside the view field 1511, and moreover in a cell1513 for fine recognition in the cell 1512.

In starting the wafer mark recognition operation, the image pickupcamera 151 is positioned on the basis of coordinates data of the firstdetection point 2232 for recognition. However, the first detection point2232 for recognition is not always included in the view field 1511 whenthe image pickup camera 151 first images the semiconductor wafer 201because of a displacement or the like of the semiconductor wafer 201when loaded on the wafer stage 1111. Therefore, it is determined duringstep S31 whether or not the first detection point 2232 for recognitioncan be recognized by the recognition device 150. When this detectionpoint can be recognized, the method proceeds to next step S34. Themethod proceeds to step S32 if the detection point cannot be recognized.

If a true point to be recognized, i.e., the above first detection point2232 for recognition, is present outside a maximum deviation area 1514defined by four points with coordinates positions of ±x in the Xdirection and ±y in the Y direction from a central position of the viewfield 1511 for which the image pickup camera is positioned, it isimpossible to recognize the first detection point 2232, therebynecessitating shifting the view field 1511. The maximum deviation area1514 is a region beyond the view field 1511.

During step S32, one of three operations: that is, operation ofsearching for the first detection point 2232 shown in FIG. 18 or 19(steps S321–S322 and steps S323–S324) operation of searching for thefirst detection point 2232; and operation of facilitating recognizing asecond detection point, these latter two being shown in FIG. 20 (stepsS325–S328), is performed. Each of these operations will be describedbelow.

In a search operation for the first detection point 2232 shown in FIG.18, during step S321, the image pickup camera 151 starts a recognitionoperation from a search start position 1515 of (−x, −y), which arecoordinates including one point from among four corners defining themaximum deviation area 1514 as shown in FIG. 21, on the basis ofcoordinates of the first detection point 2232 registered beforehand in abump formation program.

As mentioned before, a position of a preliminarily registered firstdetection point 2232 is normally not coincident with a central positionof the view field 1511 because of displacement or the like of thesemiconductor wafer 201 when loaded, as is clearly shown in FIG. 21.

Although the search start position 1515 is set to the coordinates (−x,−y) in the embodiment, the position is not limited to this and may beany other of the three points of the four corners forming the maximumdeviation area 1514.

The first detection point 2232 is searched for during next step S322while the image pickup camera 151 is moved by every distance 1517 alongthe X and Y directions in a serpentine search direction 1516 within themaximum deviation area 1514 from the search start position 1515, forinstance, by a predetermined distance in the X direction, then by apredetermined distance in the Y direction, then by a predetermineddistance in a direction opposite to the X direction, then by apredetermined distance in the Y direction again, and then by apredetermined distance again in the X direction.

The distance 1517 is set to be a distance corresponding to ⅓ a length inthe X or Y direction of the view field 1511 in the embodiment asindicated in FIG. 22.

Moving the image pickup camera 151 in the serpentine fashion facilitatesrecognizing the search operation and its area, and setting the maximumdeviation area 1514.

During the search operation performed during the steps S321, S322, thesearch start position 1515 for the first detection point 2232 is set to(−x, −y), which are position coordinates of one point from among fourpoints defining the maximum deviation area 1514. Meanwhile, during thesearch operation for the first detection point 2232 indicated in FIG.19, a search start position 1519 is set to coordinates of a center ofthe view field 1511 to search inside the maximum deviation area 1514during step S323.

During next step S324, as shown in FIG. 23, the first detection point2232 is searched for while the image pickup camera 151 is moved by thedistance 1517 in a search direction 1518, that is nearly spiral, insidethe maximum deviation area 1514 from the search start position 1519. Thedistance 1517 is set to a distance corresponding to ⅓ the length in theX or Y direction of the view field 1511 during step S324 as well asduring step S322.

The above manner of moving the image pickup camera 151 nearly spirallyenables the first detection point 2232 to be detected early as comparedwith the method of moving the image pickup camera in the serpentinefashion, if the first detection point 2232 is highly possibly present inthe vicinity of the center of the view field 1511. Moreover, when aregion inside the view field 1511 where the first detection point 2232is highly possibly present is already known, the first detection point2232 can be detected early by moving the image pickup camera 151spirally starting from a point within this region of high possibility.

A combined movement method of the above-described serpentine movementand spiral movement may also be adopted.

The search operation performed during steps S325–S328 will be discussedhere, during which the first detection point 2232 is recognized duringstep S325 based on the search operation performed during steps S321–S322and steps S323–S324.

During next step S326, it is determined whether or not a detection pointfor inclination correction, which corresponds to an example of a markfor detection, is present inside the view field 1511. The detectionpoint for inclination correction is an arbitrary characteristic point onthe semiconductor wafer 201 present inside the view field 1511 havingthe first detection point 2232 at a center thereof, and is preliminarilyregistered in the bump formation program. For example, as shown in FIG.24, a corner part on an outline 2231 of the IC formation pattern, whichis different from first detection point 2232, may be set as thedetection point 2233 for inclination correction. The detection point2233 for inclination detection may be an arbitrarily shaped part of theIC 223 present inside the view field 1511, or a mark for the detectionpoint for inclination correction may be newly formed on the IC 223. Or amark for the detection point for inclination correction may be formed ina region inside the view field 1511 and outside the outline 2231 wherean aluminum film is formed.

When the detection point 2233 for inclination correction is determinedto be inside the view field 1511 during above step S326, the inclinationcorrection detection point 2233 is detected during step S327 withoutmoving the image pickup camera 151. In contrast, if the inclinationcorrection detection point 2233 is not present in the view field 1511 asin FIG. 24, the method proceeds to step S328.

During step S328, the image pickup camera 151 is moved to position thefirst detection point 2232 at the center of the view field 1511 as shownin FIG. 25 because a coordinates position of the first detection point2232 for recognition is already known. Since the detection point 2233for inclination correction is set to be present inside the view field1511, in which the first detection point 2232 is present at the centerof the view field 1511 as described hereinabove, the detection point2233 for inclination correction can be caught within the view field 1511by the above movement of the image pickup camera 151. Other than bymoving the first detection point 2232 to the center of the view field1511, the image pickup camera 151, namely, the view field 1511 may besequentially moved to position the first detection point 2232sequentially at four corner parts of the view field 1151 to catch thedetection point 2233.

The method then proceeds to the aforementioned step S327, where thedetection point 2233 for inclination correction is detected.

As described above, by preliminarily setting the detection point 2233for inclination correction inside the view field 1511 and centering thefirst detection point 2232 for recognition, not only the first detectionpoint 2232 for recognition can be recognized, but the detection point2233 for inclination correction can also be recognized. As a result ofthis, positional deviation of the ICs 223 formed on the semiconductorwafer 201 can be detected, e.g., on the basis of coordinates informationof the first detection point 2232, and moreover, rough information onthe angle of inclination of the ICs 223 formed on the semiconductorwafer 201 can be obtained on the basis of the coordinates information ofthe first detection point 2232 for recognition and the detection point2233 for inclination correction. A time necessary for a search to beperformed during a recognition operation for a second detection pointfor recognition, to be described later, can be shortened or eveneliminated.

Since the angle of inclination can be obtained with a higher accuracy ifthe inclination is obtained by detecting a position as far as possiblefrom the first detection point 2232, recognizing a second detectionpoint for recognition is performed in the embodiment as described below.However, the recognition operation for the second detection point forrecognition can be eliminated and the inclination angle obtained withuse of the detection point 2233 for inclination correction may beutilized.

Regarding detection point 2233 for inclination correction, a corner partin outline 2231 is set as the detection point 2233 for inclinationcorrection in the present embodiment as above. The detection point 2233in this embodiment is accordingly formed from two orthogonal lines.However, this detection mark is not limited to the above two orthogonallines and an arbitrary shape, e.g., a circle, a triangle, a square, across or the like can be selected.

When the shape is other than a circle, and if semiconductor wafer 201 isdisposed exceeding, e.g., by ±5° a normal arrangement position wherebythe recognition device 150 cannot determine an inclination difference ofthe semiconductor wafer 201, it is difficult to recognize theinclination difference. As such, when an inclination greater than ±5° isestimated, detection mark 2233 for inclination correction is preferablymade circular, for example, in a form shown in FIG. 26 or 27.

Step S32 is completed by performing the above operation.

It is determined after step S33 whether or not the first detection point2232 for recognition can be detected through a search operationperformed during step S32. The method proceeds to next step S34 when thedetection point can be detected, whereas an error stop is determinedwhen the detection point cannot be detected and a bump formation processis stopped.

During step S34 similar to above step S31, it is determined whether ornot the second detection point for recognition, which is a second pointof characteristic points on the semiconductor wafer 201 placed on thewafer stage 1111 and corresponds to an example of a mark for detection,is recognized by the image pickup camera 151 of the recognition device150. As shown in FIG. 28, second detection point 2234 for recognitionmay be set, e.g., to a corner part on outline 2231 similar to the firstdetection point 2232 for recognition.

When the semiconductor wafer 201 is inclined by within ±5° in terms ofan inclination value of the semiconductor wafer 201, the first detectionpoint 2232 for recognition and the detection point 2233 for inclinationcorrection can be detected by moving the image pickup camera 151 in theX and Y directions. The image pickup camera 151 is then moved towards aposition where the second detection point 2234 for recognition ispresent with utilization of rough information of the inclination angleobtained from positional information of the first detection point 2232for recognition and the detection point 2233 for inclination correction.The second detection point 2234 for recognition is recognized byperforming the same operation as that performed during step S32.

On the other hand, if inclination of the semiconductor wafer 201 isbeyond ±5°, the image pickup camera 151 can be moved in a manner asfollows towards a position where the second detection point 2234 forrecognition is present. Since the heating device 110 has the waferturning member 111 and the turning device 112, and hence can turn thesemiconductor wafer 201 by any angle, as described earlier, in thisembodiment the semiconductor wafer 201 is roughly positioned by thefollowing operation. Namely, first, the image pickup camera 151 is movedwhile the wafer stage 1111 with the semiconductor wafer 201 thereon isturned, so that both end parts of an orientation flat of thesemiconductor wafer 201 are detected. Then, the wafer stage 1111 isturned to a position which corresponds to ½ coordinates obtained on thebasis of the above obtained positional information of the two end parts,whereby the semiconductor wafer 201 is roughly positioned. Thereafter,after recognizing the first detection point 2232 as above, the detectionpoint 2233 for inclination correction is detected as in the descriptionof steps S326–S328. The image pickup camera 151 is moved towards theposition where the second detection point 2234 is present withutilization of the rough information on the inclination angle obtainedfrom this positional information. An operation of roughly positioningthe semiconductor wafer 201 by detecting the orientation flats may beomitted.

An operation similar to that performed during step S32 is performedduring next step S35, whereby the second detection point 2234 forrecognition is recognized.

By moving the image pickup camera 151 while turning the wafer stage 1111in the manner as above, a quantity of movement of the image pickupcamera 151 can be reduced and recognition of the detection point 2233for inclination correction can be sped up.

It is determined during next step S36 whether or not the seconddetection point 2234 for recognition can be detected by the searchoperation performed during step S35. The method proceeds to next stepS37 when the detection point can be detected. An error stop isdetermined when the detection point cannot be detected and the bumpformation process is brought to a halt.

An angle for turning the wafer stage 1111 is obtained during step S37 onthe basis of coordinates information of the first detection point 2232for recognition and the second detection point 2234 for recognitionobtained during above steps S32 and S35.

The control device 180 turns the wafer stage 1111 during following stepS38 according to this obtained turning angle. Accordingly, the row andcolumn directions as the arrangement direction of ICs 223 in the ICformation pattern of the semiconductor wafer 201 are agreed with the Xand Y directions. The method proceeds to step S1 described before.

As explained above, before step S1 is executed, an inclinationdifference of the IC formation pattern is detected and a quantity ofinclination is obtained, and then the semiconductor wafer 201 is turnedbeforehand in accordance with the quantity of inclination. The Xdirection is accordingly agreed with the row direction 221 and the Ydirection is agreed with the column direction 222. Thus, since theinclination of the basic block 230 is already corrected at a time whenbumps are to be formed, it is enough to recognize only one of two marks224 for positional recognition of the basic block 230. Accordingly, therecognition operation can be lessened and productivity can be furtherimproved.

As is detailed herein, according to the bump forming apparatus 101 andthe bump formation method of the present embodiment, the number of timesof performing a recognition operation is reduced in comparison with theconventional art, so that productivity can be improved. For instancewhen there are 3100 ICs formed on a semiconductor wafer and 8 bumps areto be formed on each IC, conventionally, approximately 80 minutes arerequired to form bumps if two marks are recognized for each IC. Incontrast, bump formation can be completed in about 38 minutes byexecuting the operation performed during above steps S31–S38 and formingbumps in units of blocks as described above.

Productivity can hence be increased to approximately 1.5–3 times that ofthe conventional art according to the bump forming apparatus 101 and thebump formation method of the embodiment. In other words, if productivityis allowed to be at an equal level to that of the conventional art, aninstallation area of the bump forming apparatus can be reduced toapproximately 1/1.5–⅓ an installation area of the conventional art.

Although the present invention has been fully described in connectionwith the preferred embodiments thereof with reference to theaccompanying drawings, it is to be noted that various changes andmodifications are apparent to those skilled in the art. Such changes andmodifications are to be understood as included within the scope of thepresent invention as defined by the appended claims unless they departtherefrom.

1. A method for forming bumps on a semiconductor wafer, comprising:defining basic blocks from ICs arranged in a grid pattern on asemiconductor wafer, each of said basic blocks having a plurality ofsaid ICs adjacent one another in a row or column direction or in row andcolumn directions, and each of said ICs having a mark; and performingpositional recognition for forming bumps on said plurality of said ICsof said each of said basic blocks by independently performing positionalrecognition of said each of said basic blocks on a basis of recognizingtwo marks of two different ones of said plurality of ICs, respectively.2. The method according to claim 1, wherein independently performingpositional recognition of said each of said basic blocks includesperforming positional recognition of one of said each of said basicblocks and then performing positional recognition of a second of saideach of said basic blocks, and further comprising: based on thepositional recognition of said one of said each of said basic blocks,continuously forming bumps on said ICs defining said one of said each ofsaid basic blocks prior to performing the positional recognition of saidsecond of said each of said basic blocks.
 3. The method according toclaim 1, wherein the bumps are to be formed on electrodes of said ICs,and further comprising: determining a number of said ICs defining saideach of said basic blocks to be such that positional deviations of allelectrodes of all said ICs defining said each of said basic blocks, andall bumps formed on said all electrodes, are accommodated within anallowable range when said all bumps are continuously formed on said allelectrodes.
 4. The method according to claim 1, further comprising:after defining said basic blocks from said ICs, when ICs remain on saidsemiconductor wafer in an amount not satisfying an amount of said ICsdefining said each of said basic blocks, performing positionalrecognition and bump formation for each of the remaining ICsindividually, for a plurality of the remaining ICs, or for a combinationof a plurality of the remaining ICs and one remaining IC, until bumpsare formed on all of the remaining ICs.
 5. The method according to claim1, wherein recognizing two marks of two different ones of said pluralityof ICs comprises recognizing, from among marks applied to ICs at bothends of said each of said basic blocks, two marks located at diagonalpositions of said each of said basic blocks.
 6. The method according toclaim 1, further comprising: detecting defective IC information, therebyidentifying a defective IC from among said ICs defining said each ofsaid basic blocks, while continuously forming bumps on said ICs definingsaid each of said basic blocks.
 7. The method according to claim 1,wherein said marks on said ICs are either (i) position recognition marksapplied to said ICs, (ii) portions, as a substitute for said positionrecognition marks, of a circuit pattern on said ICs, or (iii) one ofsaid position recognition marks and one of said portions.
 8. The methodaccording to claim 1, wherein said two different ones of said ICs forselecting said two marks to be recognized are located in said row orcolumn direction, or a position inclined relative to said row or columndirection.
 9. The method according to claim 1, further comprising: basedon the positional recognition of said each of said basic blocks,continuously forming bumps on said ICs defining said each of said basicblocks; determining the number of times that a corresponding one of saidtwo marks for each of said basic blocks cannot be recognized, andceasing formation of bumps when the number of times exceeds apredetermined value.
 10. The method according to claim 1, whereindefining basic blocks from ICs arranged in a grid pattern comprisesdefining said basic blocks by a number of rows and columns of said ICs,with said number being stored in a memory of a control device.
 11. Themethod according to claim 1, wherein recognizing two marks of twodifferent ones of said plurality of ICs comprises recognizing a first ofsaid two marks and then recognizing a second of said two marks.
 12. Themethod according to claim 11, wherein said marks on said ICs are either(i) position recognition marks applied to said ICs, (ii) portions, as asubstitute for said position recognition marks, of a circuit pattern onsaid ICs, or (iii) one of said position recognition marks and one ofsaid portions.
 13. The method according to claim 11, wherein said twodifferent ones of said ICs for selecting said two marks to be recognizedare located in said row or column direction, or a position inclinedrelative to said row or column direction.
 14. The method according toclaim 11, further comprising: based on the positional recognition ofsaid each of said basic blocks, continuously forming bumps on said ICsdefining said each of said basic blocks; determining the number of timesthat a corresponding one of said two marks for each of said basic blockscannot be recognized, and ceasing formation of bumps when the number oftimes exceeds a predetermined value.
 15. The method according to claim11, wherein independently performing positional recognition of said eachof said basic blocks includes performing positional recognition of oneof said each of said basic blocks and then performing positionalrecognition of a second of said each of said basic blocks, and furthercomprising: based on the positional recognition of said one of said eachof said basic blocks, continuously forming bumps on said ICs definingsaid one of said each of said basic blocks prior to performing thepositional recognition of said second of said each of said basic blocks.16. The method according to claim 11, wherein the bumps are to be formedon electrodes of said ICs, and further comprising: determining a numberof said ICs defining said each of said basic blocks to be such thatpositional deviations of all electrodes of all said ICs defining saideach of said basic blocks, and all bumps formed on said all electrodes,are accommodated within an allowable range when said all bumps arecontinuously formed on said all electrodes.
 17. The method according toclaim 11, further comprising: after defining said basic blocks from saidICs, when ICs remain on said semiconductor wafer in an amount notsatisfying an amount of said ICs defining said each of said basicblocks, performing positional recognition and bump formation for each ofthe remaining ICs individually, for a plurality of the remaining ICs, orfor a combination of a plurality of the remaining ICs and one remainingIC, until bumps are formed on all of the remaining ICs.
 18. The methodaccording to claim 11, wherein recognizing a first of said two marks andthen recognizing a second of said two marks comprises recognizing saidfirst and second of said two marks, from among marks applied to ICs atboth ends of said each of said basic blocks, at diagonal positions ofsaid each of said basic blocks.
 19. The method according to claim 11,further comprising: detecting defective IC information, therebyidentifying a defective IC from among said ICs defining said each ofsaid basic blocks, while continuously forming bumps on said ICs definingsaid each of said basic blocks.
 20. The method according to claim 16,further comprising: determining said number of said ICs defining saideach of said basic blocks based upon at least one of (i) a position onsaid semiconductor wafer where the bumps are to be formed on theelectrodes, and (ii) an amount of time elapsed after commencement offorming the bumps on the electrodes.
 21. The method according to claim18, further comprising: prior to independently performing positionalrecognition of said each of said basic blocks, detecting an inclinationof said ICs on said semiconductor wafer; and at a time of performingindependent positional recognition of said each of said basic blocks,detecting an inclination of said ICs defining said each of said basicblocks by recognizing only one of said two marks.
 22. The methodaccording to claim 19, further comprising: not forming bumps on anydefective IC as identified by the detected defective IC information. 23.A method for forming bumps on a semiconductor wafer, comprising:defining basic blocks by a number of rows and columns of ICs, with saidnumber being stored in a memory of a control device, and each of saidbasic blocks having ICs adjacent one another in a row or columndirection or in row and column directions, from among ICs arranged in agrid pattern on a semiconductor wafer to be subjected to bump bonding;and performing positional recognition with respect to each of said basicblocks for forming bumps.
 24. A method for forming bumps on asemiconductor wafer, comprising: defining basic blocks by a number ofrows and columns of ICs, with said number being stored in a memory of acontrol device, and each of said ICs having a pair of marks; performingpositional recognition with respect to each of said basic blocks by (i)selecting two ICs included in said each of said basic blocks and locatedat different positions, respectively, (ii) recognizing a mark of one ofsaid two ICs, and (iii) recognizing a mark of the other of said two ICs;and forming bumps on said ICs included in said each of said basicblocks.